The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Nov. 24, 2020
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Yu-Chieh Chou, New Taipei, TW;

Tsung-Hsiang Lin, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7786 (2013.01); H01L 27/0605 (2013.01); H01L 29/0653 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01);
Abstract

A semiconductor structure includes a substrate, a semiconductor epitaxial layer, a semiconductor barrier layer, a first semiconductor device, a doped isolation region, and at least one isolation pillar. The substrate includes a core layer and a composite material layer, the semiconductor epitaxial layer is disposed on the substrate, and the semiconductor barrier layer is disposed on the semiconductor epitaxial layer. The first semiconductor device is disposed on the substrate, where the first semiconductor device includes a first semiconductor cap layer disposed on the semiconductor barrier layer. The doped isolation region is disposed at one side of the first semiconductor device. At least a portion of the isolation pillar is disposed in the doped isolation region, and the isolation pillar surrounds at least a portion of the first semiconductor device and penetrates the composite material layer.


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