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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11551922 B1

PDFFull Text
Date of Patent:
Jan. 10, 2023

Filed:

Sep. 22, 2017

Method of polishing silicon wafer including notch polishing process and method of producing silicon wafer

Applicant:

Sumco Corporation, Tokyo, JP;

Inventor:

Tsuyoshi Morita, Tokyo, JP;

Assignee:

SUMCO CORPORATION, Tokyo, JP;

Attorney:

Greenblum & Bernstein, P.L.C.

Primary Examiner:

John P Dulka

Int. Cl.
CPC ...
H01L 21/02 (2006.01); B24B 9/06 (2006.01); B24B 37/08 (2012.01); C30B 15/00 (2006.01); C30B 29/06 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02013 (2013.01); B24B 9/065 (2013.01); B24B 37/08 (2013.01); C30B 15/00 (2013.01); C30B 29/06 (2013.01); H01L 21/67288 (2013.01);
Abstract

Provided are a method of polishing a silicon wafer and a method of producing a silicon wafer which can reduce the formation of step-forming microdefects on a silicon wafer. The method includes: a double-side polishing step of performing polishing on front and back surfaces of a silicon wafer; a notch portion polishing step of performing polishing on a beveled portion of a notch portion of the silicon wafer after the double-side polishing step; a peripheral beveled portion polishing step of performing polishing on the beveled portion on the periphery of the silicon wafer other than the beveled portion of the notch portion after the notch portion polishing step; and a finish polishing step of performing finish polishing on the front surface of the silicon wafer after the peripheral beveled portion polishing step. The notch portion polishing step is performed in a state where the front surface is wet with water.

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Morita, Tsuyoshi. (2023). Method of polishing silicon wafer including notch polishing process and method of producing silicon wafer (U.S. Patent No. 11551922). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11551922

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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