The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Apr. 15, 2015
Applicant:

Maxlinear, Inc., Carlsbad, CA (US);

Inventors:

Ingo Volkening, Singapore, SG;

Ritesh Banerjee, Bangalore, IN;

Olaf Wachendorf, Unterhaching, DE;

Stephan Pruecklmayer, Hoehenkirchen-Slegertsbrunn, DE;

Assignee:

MaxLinear, Inc., Carlsbad, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/10 (2013.01); G06F 21/57 (2013.01); H04L 9/32 (2006.01); H04L 9/40 (2022.01);
U.S. Cl.
CPC ...
G06F 21/10 (2013.01); G06F 21/57 (2013.01); G06F 21/575 (2013.01); H04L 9/3247 (2013.01); H04L 63/0281 (2013.01); H04L 63/06 (2013.01); H04L 63/061 (2013.01);
Abstract

First transistor logic is arranged by a first logic provider in circuit form and provides a minimum of functionality of the semiconductor device employed to bring up the semiconductor device, wherein the minimum of functionality is encrypted using a first encryption key. Second transistor logic is arranged by a second logic provider, different than the first logic provider, in circuit form to include security keys capable to perform cryptographic capabilities using a second encryption key. The second transistor logic further includes functionality that completes the semiconductor device as a chip device and is ready to process secure communication signals.


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