The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Jul. 17, 2020
Applicant:

Coherent Logix, Incorporated, Austin, TX (US);

Inventors:

Carl S. Dobbs, Austin, TX (US);

Keith M. Bindloss, San Clemente, CA (US);

Kenneth R. Faulkner, Austin, TX (US);

Alex E. Icaza, Austin, TX (US);

Frederick A. Rush, Hillsdale, MI (US);

Faisal A. Syed, Austin, TX (US);

Michael R. Trocino, Austin, TX (US);

Assignee:

Coherent Logix, Incorporated, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/173 (2006.01); G06F 9/54 (2006.01); H04L 45/745 (2022.01);
U.S. Cl.
CPC ...
G06F 15/17343 (2013.01); G06F 9/542 (2013.01); G06F 9/544 (2013.01); G06F 9/546 (2013.01); G06F 15/17312 (2013.01); H04L 45/745 (2013.01);
Abstract

A multi-processor system with processing elements, interspersed memory, and primary and secondary interconnection networks optimized for high performance and low power dissipation is disclosed. In the secondary network multiple message routing nodes are arranged in an interspersed fashion with multiple processors. A given message routing node may receive messages from other message nodes, and relay the received messages to destination message routing nodes using relative offsets included in the messages. The relative offset may specify a number of message nodes from the message node that originated a message to a destination message node.


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