The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Aug. 07, 2018
Applicant:

Sanmina Corporation, San Jose, CA (US);

Inventors:

Charles C. Hill, Portland, OR (US);

Franz Michael Schuette, Colorado Springs, CO (US);

Assignee:

SANMINA CORPORATION, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 3/36 (2006.01); H05K 1/14 (2006.01); H05K 3/30 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); G06F 13/40 (2013.01); G06F 13/409 (2013.01); H05K 1/141 (2013.01); H05K 3/303 (2013.01); H05K 3/36 (2013.01); H05K 1/144 (2013.01); H05K 2201/042 (2013.01); H05K 2201/09218 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10189 (2013.01); H05K 2201/10325 (2013.01);
Abstract

One feature pertains to a modular design of a motherboard for a computer system. The mother board is disaggregated into a CPU board and an IO board. The CPU board contains at least one CPU, the associated memory subsystem and the voltage regulator module. The integrated IO ports escape to a high speed connector mating with its counterpart on an IO board which contains all peripheral devices including system logic not part of the CPU. In a multi-socket configuration the CPUs are on the CPU board and the processor interconnects are routed directly in a point to point manner.


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