The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Jun. 21, 2021
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Uri Leder, Lotem, IL;

Ori Cohen, Atlit, IL;

Benzi Denkberg, Etz Efraim, IL;

Max Chvalevsky, Mevaseret Zion, IL;

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3323 (2020.01); G01R 31/317 (2006.01); G06F 30/31 (2020.01); G06F 117/08 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3323 (2020.01); G01R 31/31704 (2013.01); G06F 30/31 (2020.01); G06F 2117/08 (2020.01);
Abstract

Hardware-software interaction testing is performed using formal verification for language-specified hardware designs. A description of valid access using an interface for a configuration space of a language specified hardware design and a description of a valid output of the language-specified hardware design is received. Formal verification is performed on the language-specified hardware design using the interface for the configuration space according to the description of valid access using the interface. A sequence of access to the configuration space using the interface that causes a failure to produce the valid output of the language-specified hardware design according to the description of valid output to identify as an error for the language-specified hardware design.


Find Patent Forward Citations

Loading…