The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Mar. 28, 2019
Applicant:

Red Bend Ltd., Hod Hasharon, IL;

Inventors:

David Mor Ofek, Nes Harim, IL;

Yuval Weisglass, Kfar Sava, IL;

Assignee:

Red Bend Ltd., Hod Hasharon, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); G06F 21/57 (2013.01); G06F 8/656 (2018.01); G06F 8/75 (2018.01); G06F 21/54 (2013.01); G06F 21/55 (2013.01); G06F 9/445 (2018.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 21/577 (2013.01); G06F 8/656 (2018.02); G06F 8/75 (2013.01); G06F 21/54 (2013.01); G06F 21/55 (2013.01); G06F 21/554 (2013.01); G06F 9/44505 (2013.01); G06F 11/0793 (2013.01); G06F 2221/033 (2013.01);
Abstract

A system of mitigating code weaknesses in a target code by adding micro functionality fixes. The system includes a mitigation module installed a memory chip of a device and a server for identifying a plurality of code weaknesses in a target code installed in a memory chip of a device and sending configuration instructions to the mitigation module, the configuration instructions comprising: a plurality of micro functionality fixes, and a plurality of code weakness locations each associated with one of the plurality of code weaknesses and one of the plurality of micro functionality fixes. The execution of the mitigation module by at least one processor of the device induces an installment of the plurality of micro functionality fixes in the plurality of code weakness locations.


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