The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Feb. 27, 2020
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Mirko Dondini, Catania, IT;

Daniele Mangano, San Gregorio di Catania, IT;

Riccardo Condorelli, Tremestieri Etneo/Catania, IT;

Assignee:

STMICROELECTRONICS S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/00 (2006.01); G05F 1/575 (2006.01); G05B 19/042 (2006.01); G06F 13/40 (2006.01); H03B 5/32 (2006.01); H03K 19/17736 (2020.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05B 19/0423 (2013.01); G06F 13/4068 (2013.01); H03B 5/32 (2013.01); H03K 19/17744 (2013.01);
Abstract

An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.


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