The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Dec. 10, 2020
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventor:

Ferdinando Iucolano, Gravina di Catania, IT;

Assignee:

STMICROELECTRONICS S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/778 (2006.01); H01L 21/324 (2006.01); H01L 21/225 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66462 (2013.01); H01L 21/2258 (2013.01); H01L 21/3245 (2013.01); H01L 29/1066 (2013.01); H01L 29/2003 (2013.01); H01L 29/778 (2013.01); H01L 29/7786 (2013.01);
Abstract

A manufacturing method of an HEMT includes: forming a heterostructure; forming a first gate layer of intrinsic semiconductor material on the heterostructure; forming a second gate layer, containing dopant impurities of a P type, on the first gate layer; removing first portions of the second gate layer so that second portions, not removed, of the second gate layer form a doped gate region; and carrying out a thermal annealing of the doped gate region so as to cause a diffusion of said dopant impurities of the P type in the first gate layer and in the heterostructure, with a concentration, in the heterostructure, that decreases as the lateral distance from the doped gate region increases.


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