The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Jul. 01, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Layne A. Berge, Rochester, MN (US);

Matthew Doyle, Chatfield, MN (US);

John R. Dangler, Rochester, MN (US);

Kyle Schoneck, Rochester, MN (US);

Thomas W. Liang, Rochester, MN (US);

Matthew A. Walther, Rochester, MN (US);

Jason J. Bjorgaard, Rochester, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01G 4/35 (2006.01); H05K 1/02 (2006.01); H01G 4/28 (2006.01); H01L 49/02 (2006.01); H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
H01G 4/35 (2013.01); H01G 4/28 (2013.01); H01L 28/60 (2013.01); H05K 1/0231 (2013.01); H05K 1/162 (2013.01);
Abstract

A grid array capacitor can be used to physically and electrically couple an integrated circuit (IC) package to a printed circuit board (PCB). The grid array capacitor includes an inner conductor and an inner dielectric coaxially surrounding the inner conductor. A secondary conductor can be located to surround, in a coaxial orientation, the inner dielectric. Both the inner conductor and the secondary conductor can be electrically connected to the IC package and to the PCB. In certain applications, the structure of the inner conductor, inner dielectric, and secondary conductor can provide capacitance used to decouple electronic circuits.


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