The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2022
Filed:
Mar. 17, 2021
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Seyed Arash Mirhaj, Poway, CA (US);
Ankit Srivastava, San Diego, CA (US);
Sameer Wadhwa, San Diego, CA (US);
Ren Li, San Diego, CA (US);
Suren Mohan, San Diego, CA (US);
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01); G11C 7/12 (2006.01); G11C 7/10 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G11C 7/1012 (2013.01); G11C 7/1051 (2013.01); G11C 7/18 (2013.01);
Abstract
A compute-in-memory bitcell is provided that includes a pair of cross-coupled inverters for storing a stored bit. The compute-in-memory bitcell includes a logic gate formed by a pair of switches for multiplying the stored bit with an input vector bit. A controller controls the pair of switches responsive to a sign bit during a computation phase of operation and controls the pair of switches responsive to a magnitude bit during an execution phase of operation.