The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Sep. 27, 2021
Applicants:

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhuo Xu, Beijing, CN;

Yajie Bai, Beijing, CN;

Shuai Chen, Beijing, CN;

Xiaofeng Ma, Beijing, CN;

Hyungkyu Kim, Beijing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/20 (2006.01); G09G 3/32 (2016.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/2092 (2013.01); G09G 3/32 (2013.01); G11C 19/28 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01);
Abstract

Disclosed are a first shift register, a driving method for the same, a gate driving circuit and a display device. The first shift register includes a first unit, M second units and N third units. A first signal output terminal of the first unit is connected with M second signal input terminals of the M second units. A second signal output terminal of each second unit is connected with third signal input terminals of N/M third units respectively. The first unit outputs a voltage of a first clock signal terminal to the first signal output terminal and a fourth signal output terminal under the control of a first signal input terminal and a second clock signal terminal and outputs a voltage of a first voltage terminal to the first signal output terminal and the fourth signal output terminal.


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