The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Jul. 29, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Derek E. Williams, Round Rock, TX (US);

Guy L. Guthrie, Austin, TX (US);

Hugh Shen, Round Rock, TX (US);

David Campbell, Austin, TX (US);

Bryan Lloyd, Austin, TX (US);

Samuel David Kirchhoff, Austin, TX (US);

Jeffrey A. Stuecheli, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0811 (2016.01); G06F 12/0808 (2016.01); G06F 12/02 (2006.01); G06F 12/1045 (2016.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0238 (2013.01); G06F 12/0808 (2013.01); G06F 12/0817 (2013.01); G06F 12/1045 (2013.01);
Abstract

A memory-referent instruction is executed to calculate a target effective address (EA) of a corresponding memory-referent request. An array entry in an upper level cache is allocated, and the EA is specified in a corresponding EA directory entry. While in-flight, the memory-referent request is buffered in a queue in association with a pointer to the entry in the EA directory. Based on receiving a translation invalidation request requesting invalidation of an address translation in a translation structure, the processor core walks the EA directory, determines the EA in the entry matches an address range specified by the translation invalidation request, and, based on the match, precisely marks the memory-referent request using the pointer to the EA directory entry. Based on the marking, the translation invalidation request is permitted to complete with reference to the processor core only after the memory-referent request has drained from the processing unit.


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