The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Dec. 17, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Zhengzheng Wu, Santa Cruz, CA (US);

Chao Song, San Diego, CA (US);

Karthik Nagarajan, Poway, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/085 (2006.01); H03L 7/197 (2006.01); H03L 7/099 (2006.01); H03K 3/037 (2006.01); H03K 5/00 (2006.01); H03K 19/20 (2006.01); H03L 7/093 (2006.01); H04M 1/725 (2021.01);
U.S. Cl.
CPC ...
H03L 7/0995 (2013.01); H03K 3/037 (2013.01); H03K 5/00006 (2013.01); H03K 19/20 (2013.01); H03L 7/085 (2013.01); H03L 7/093 (2013.01); H03L 7/197 (2013.01); H04M 1/725 (2013.01);
Abstract

A digital phase-frequency detector characterizes a delay between two input clock signals using a ring oscillator. A cycle count of a ring oscillator signal circulating through a loop in the ring oscillator during the delay provides a coarse measurement of the delay. A phase of the ring oscillator signal in the loop at the end of the delay provides a fine measurement of the delay. A digital phase-locked loop may control an oscillation frequency of a digitally-controlled oscillator responsive to the fine measurement of the delay and control a division within a clock divider responsive to the coarse measurement of the delay.


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