The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Sep. 29, 2021
Applicant:

Postech Research and Business Development Foundation, Pohang-si, KR;

Inventors:

Seokhyeong Kang, Pohang-si, KR;

Sunmean Kim, Pohang-si, KR;

SungYun Lee, Busan, KR;

Sunghye Park, Daegu, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 (2006.01); H03K 19/0944 (2006.01); H03K 19/20 (2006.01); G06F 7/46 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0944 (2013.01); G06F 7/461 (2013.01); H03K 19/20 (2013.01);
Abstract

A circuit includes a plurality of first counting gates, a first ternary half adder (THA) and a second THA that are connected to the plurality of first counting gates, a third THA configured to receive a sum output signal of the first THA and a sum output signal of the second THA, a first ternary sum gate configured to receive a carry output signal of the first THA and a carry output signal of the second THA, and a second ternary sum gate configured to receive a carry output signal of the third THA and an output signal of the first ternary sum gate, wherein the third THA and the second ternary sum gate may be configured to output voltage signals corresponding to a number of drain voltages among input signals applied to the plurality of first counting gates.


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