The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

May. 10, 2021
Applicant:

Nxp B.v., Eindhoven, NL;

Inventor:

Jan-Peter Schat, Hamburg, DE;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G11C 29/14 (2006.01); G11C 29/18 (2006.01); G11C 29/44 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/14 (2013.01); G11C 29/18 (2013.01); G11C 29/44 (2013.01); H03K 19/1737 (2013.01);
Abstract

The disclosure relates to a method and system for memory testing to detect memory errors during operation of a memory module. Example embodiments include a method of detecting an error in a memory module (), the method comprising the sequential steps of: i) receiving () a request from a processor executing an application for a read or write operation at a location of the memory module () identified by an address; ii) outputting data () from, or writing to, the location of the memory module (); iii) generating () by an error detection module () a further read request for the location of the memory module () identified by the address; iv) receiving () at the error detection module () an error correction code from the memory module () for the location identified by the address; and vi) providing () by the error detection module () an alert output for the address if the error correction code indicates an error.


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