The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Jun. 04, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Atsushi Kawasumi, Fujisawa Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); G11C 16/12 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01); G11C 7/10 (2006.01); H03K 5/14 (2014.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
G11C 16/12 (2013.01); G11C 7/1057 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); H03K 5/14 (2013.01); H03K 19/21 (2013.01);
Abstract

A semiconductor memory device according to an embodiment includes a peripheral circuit part supplied with a first voltage, a core circuit part supplied with a second voltage greater than the first voltage, a pre-decoder provided in the peripheral circuit part, input with a signal and outputting a one-hot signal corresponding to the signal, a first wiring provided in the peripheral circuit part, electrically connected to the pre-decoder, and supplied with the one-hot signal, a second wiring provided in the core circuit part, a level shifter provided in the peripheral circuit part, supplied with a first voltage and a second voltage, and transferring the one-hot signal from the first wiring in the peripheral circuit part to the second wiring in the core circuit part, and a memory cell array provided in the core circuit part and operating based on the transferred one-hot signal.


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