The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2022
Filed:
Sep. 25, 2020
Applicants:
The Regents of the University of California, Oakland, CA (US);
University of Notre Dame Du Lac, South Bend, IN (US);
Inventors:
Assignees:
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US);
UNIVERSITY OF NOTRE DAME DU LAC, South Bend, IN (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/56 (2006.01); G11C 11/22 (2006.01); H01L 49/02 (2006.01); H01L 27/11507 (2017.01);
U.S. Cl.
CPC ...
G11C 11/5657 (2013.01); G11C 11/221 (2013.01); G11C 11/2275 (2013.01); H01L 27/11507 (2013.01); H01L 28/60 (2013.01);
Abstract
An N-bit non-volatile multi-level memory cell (MLC) can include a lower electrode and an upper electrode spaced above the lower electrode. N ferroelectric material layers can be vertically spaced apart from one another between the lower electrode and the upper electrode, wherein N is at least 2 and at least one dielectric material layer having a thickness of less than 20 nm can be located between the N ferroelectric material layers.