The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Jan. 17, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Satya Someswara Kaushik Yanamandra, Duluth, GA (US);

Soumya Chandramouli, Atlanta, GA (US);

Michael Shin-Chyr Lu, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/52 (2020.01); H03K 5/24 (2006.01); G01R 19/165 (2006.01); H03H 11/28 (2006.01); H04B 1/04 (2006.01); H04B 1/16 (2006.01);
U.S. Cl.
CPC ...
G01R 31/52 (2020.01); G01R 19/16576 (2013.01); H03H 11/28 (2013.01); H03K 5/24 (2013.01); H04B 1/04 (2013.01); H04B 1/16 (2013.01);
Abstract

Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes an output node at which a voltage for transmission via a differential conductor is present. The circuit further includes a first pull-up network coupled between a voltage supply node and the output node and configured to include a first amount of resistance. The circuit further includes a second pull-up network coupled between a voltage supply node and the output node and configured to include a second amount of resistance. The circuit further includes a comparator having a first input terminal coupled to the output node, a second input terminal configured to receive a reference voltage, and an output terminal configured to output a comparison result.


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