The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2022
Filed:
Apr. 02, 2020
Applicants:
SK Hynix Inc., Icheon, KR;
Korea Advanced Institute of Science and Technology (Kaist), Daejeon, KR;
Inventors:
Assignees:
SK HYNIX INC., Icheon, KR;
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY (KAIST), Daejeon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G06N 3/063 (2006.01); G11C 16/04 (2006.01); G06N 3/04 (2006.01); G11C 16/08 (2006.01); G06F 7/523 (2006.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
G06N 3/063 (2013.01); G06F 7/523 (2013.01); G06N 3/04 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/24 (2013.01);
Abstract
A nonvolatile memory device includes a memory cell array and an computation output circuit. The memory cell array includes a plurality of nonvolatile memory elements configured to store a plurality of weights respectively and a plurality of bit lines coupled to the plurality of nonvolatile memory elements according to a plurality of input signals. The computation output circuit is configured to generate a computation signal from voltages induced at the plurality of bit lines according to the plurality of input signals.