The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Mar. 04, 2021
Applicant:

Covidien Lp, Mansfield, MA (US);

Inventors:

Chi Min Seow, Watertown, MA (US);

Jaimeen Kapadia, Cambridge, MA (US);

Richard Lech, Hamden, CT (US);

Michael Zemlok, Prospect, CT (US);

Mark Macleod, Southbury, CT (US);

Assignee:

Covidien LP, Mansfield, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/14 (2006.01); A61B 34/30 (2016.01); H02K 11/33 (2016.01); A61B 34/35 (2016.01); B25J 9/12 (2006.01); H02K 5/20 (2006.01); H02K 5/22 (2006.01); H05K 1/02 (2006.01); A61B 17/00 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/148 (2013.01); A61B 34/30 (2016.02); A61B 34/35 (2016.02); B25J 9/12 (2013.01); H02K 5/20 (2013.01); H02K 5/225 (2013.01); H02K 11/33 (2016.01); H05K 1/0201 (2013.01); H05K 1/028 (2013.01); A61B 2017/00477 (2013.01); H02K 2205/09 (2013.01); H02K 2211/03 (2013.01); H05K 1/147 (2013.01); H05K 1/18 (2013.01); H05K 2201/047 (2013.01); H05K 2201/10189 (2013.01); H05K 2201/2018 (2013.01);
Abstract

An integrated circuit includes a nexus and a first, a second, a third, and a fourth circuit board. Each of the first and second circuit boards is coupled to opposing sides of the nexus, and each of the third and fourth circuit boards is coupled to opposing sides of the second circuit board. The integrated circuit is transitionable between a first, open configuration, in which the first, second, third and fourth circuit boards and the nexus are substantially coplanar, and a second configuration, in which the first, second, third and fourth circuit boards and the nexus are coupled to one another to define a cavity therein.


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