The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Nov. 05, 2021
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Yao-Chia Liu, Hsinchu, TW;

Chi-Kung Kuan, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/401 (2015.01); H04L 7/033 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H04B 1/401 (2013.01); H03L 7/091 (2013.01); H04L 7/033 (2013.01);
Abstract

The present invention discloses a transceiver apparatus having phase-tracking mechanism. A phase detection circuit of a receiver circuit performs sampling and phase detection on an input data signal according to a sampling clock signal to generate a phase detection result. A proportional gain circuit of the receiver circuit applies a proportional gain operation on the phase detection result to generate a phase adjusting signal. A CDR circuit of the receiver circuit receives a source clock signal to generate the sampling clock signal and performs phase-adjusting according to the phase adjusting signal. The integral gain circuit apples an integral gain operation on the phase detection result to generate a frequency adjusting signal. The source clock generating circuit receives a reference clock signal to generate the source clock signal and perform frequency-adjusting according to the frequency adjusting signal. The transmitter circuit performs signal transmission according to the source clock signal.


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