The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Mar. 08, 2021
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Xin Zhao, Austin, TX (US);

Tejasvi Das, Austin, TX (US);

Xiaofan Fei, Austin, TX (US);

Assignee:

CIRRUS LOGIC, INC., Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45076 (2013.01); H03F 2200/129 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45512 (2013.01);
Abstract

An operational amplifier with one or more fully-differential amplifier stages has a common-mode control input. A low-frequency feedback control path is coupled between an output of the fully-differential amplifier stages and the common-mode control input to control low-frequency drift of the common-mode voltage of the output of the stages. A high-frequency feed-forward control path couples a pair of inputs of the stages to control high-frequency ripple of a common-mode voltage of the inputs of the stages. One or more of the differential amplifier stages may have a bias input that controls a direct-current (DC) bias voltage of gates of pull-up transistors of the stage that is both DC and capacitively coupled to the gates so that the stage operates with class A bias at DC and with class AB bias at high frequencies.


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