The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Oct. 28, 2020
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventor:

Takehiko Soda, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G09G 3/3225 (2016.01); G09G 3/3275 (2016.01); H01L 27/32 (2006.01); G06F 3/01 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3275 (2013.01); G06F 3/013 (2013.01); G09G 3/3233 (2013.01); H01L 27/3234 (2013.01); G09G 3/3225 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0847 (2013.01); G09G 2310/0297 (2013.01);
Abstract

A display apparatus includes a data signal output unit, a first light emitting element, a first transistor, a first capacitive element, a second transistor, and a third transistor. The first transistor is connected to the first light emitting element and includes a gate. The first capacitive element includes a first node and a second node. The second transistor is provided on a first input path through which a signal from the data signal output unit is input to the gate. The third transistor is provided on a second input path through which a signal from the data signal output unit is input to the gate and which is different from the first input path. The first node is connected to the second transistor, the third transistor, and the gate. The second node is configured to be supplied with a power source potential.


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