The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Jan. 06, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Matthew G. Borlick, Tucson, AZ (US);

Lokesh M. Gupta, Tucson, AZ (US);

Trung N. Nguyen, Tucson, AZ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5005 (2013.01); G06F 3/067 (2013.01); G06F 3/0613 (2013.01); G06F 3/0622 (2013.01); G06F 3/0631 (2013.01); G06F 3/0659 (2013.01); G06F 9/5016 (2013.01); G06F 9/5033 (2013.01); G06F 12/023 (2013.01);
Abstract

A plurality of processing entities in which a plurality of tasks are executed are maintained. Memory access patterns are determined for each of the plurality of tasks by dividing a memory associated with the plurality of processing entities into a plurality of memory regions, and for each of the plurality of tasks, determining how many memory accesses take place in each of the memory regions, by incrementing a counter associated with each memory region in response to a memory access. Each of the plurality of tasks are allocated among the plurality of processing entities, based on the determined memory access patterns for each of the plurality of tasks.


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