The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Dec. 17, 2020
Applicant:

Samsung Electronics Co., Ltd., Gyeonggi-do, KR;

Inventors:

Jongmin Jeon, Gyeonggi-do, KR;

Eunseok Hong, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 1/18 (2006.01); H05K 3/46 (2006.01); H05K 3/36 (2006.01); H05K 3/02 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0393 (2013.01); H05K 1/036 (2013.01); H05K 1/189 (2013.01); H05K 3/02 (2013.01); H05K 3/361 (2013.01); H05K 3/4652 (2013.01);
Abstract

Disclosed is a printed circuit board (PCB) module including a first PCB comprising a base PCB, a sidewall disposed on a periphery of the base PCB, and conductive vias penetrating the sidewall, a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB, and at least one electronic component disposed inside the cavity and located on the first PCB and/or the second PCB, wherein the sidewall comprises a first layer disposed on an upper face of the base PCB and constructed of an insulating member, a second layer disposed on the first layer and comprising a polyimide, a third layer disposed on the second layer and constructed of an insulating member, and a fourth layer disposed on the third layer and comprising a conductive member conductive with respect to the conductive vias.


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