The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Jun. 29, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Pavol Balaz, Freising, DE;

Hongcheng Xu, Freising, DE;

Ferdinand Stettner, Dachau, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/07 (2006.01); H03K 19/017 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H02M 3/073 (2013.01); H03K 19/01714 (2013.01); H03K 19/01735 (2013.01); H03K 19/20 (2013.01);
Abstract

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.


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