The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Oct. 02, 2020
Applicant:

Murata Manufacturing Co., Ltd., Kyoto-fu, JP;

Inventors:

Kenji Fujimoto, Nagaokakyo, JP;

Koshi Himeda, Nagaokakyo, JP;

Toshihiro Tada, Nagaokakyo, JP;

Tetsuro Toritsuka, Nagaokakyo, JP;

Shinji Kaburaki, Nagaokakyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/10 (2006.01); H01S 5/042 (2006.01); H01S 5/028 (2006.01); H01S 5/227 (2006.01);
U.S. Cl.
CPC ...
H01L 31/10 (2013.01); H01S 5/028 (2013.01); H01S 5/04254 (2019.08); H01S 5/2275 (2013.01);
Abstract

An optical semiconductor element having a mesa portion includes a substrate and semiconductor layers on the substrate. The optical semiconductor element further includes a first contact electrode, a second contact electrode on the semiconductor layer, first and second lead-out wires connected to the first and second contact electrodes, respectively, and an insulating film covering at least an upper surface of the semiconductor layer and the second contact electrode. The second lead-out wire is connected to the second contact electrode in an opening of the insulating film. An outer peripheral end of the second contact electrode in at least a portion where the second contact electrode and the second lead-out wire are connected is above and outside an outer peripheral end of a connection portion with the semiconductor layer, and an inner peripheral end is above and inside an inner peripheral end of the connection portion with the semiconductor layer.


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