The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Sep. 10, 2020
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Atsushi Oga, Yokkaichi Mie, JP;

Natsuki Fukuda, Yokkaichi Mie, JP;

Moto Yabuki, Bunkyo Tokyo, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 27/11582 (2017.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/76224 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 27/11582 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/0615 (2013.01); H01L 2224/08145 (2013.01); H01L 2924/14511 (2013.01);
Abstract

A semiconductor memory device includes a first chip and a second chip. The first chip includes a semiconductor substrate and a plurality of transistors disposed on a surface of the semiconductor substrate. The second chip includes a plurality of first conductive layers, a plurality of first semiconductor layers, and a plurality of memory cells disposed in intersection portions of the plurality of first conductive layers and the plurality of first semiconductor layers. The second chip includes a second semiconductor layer farther from the semiconductor substrate than the plurality of first conductive layers. The second semiconductor layer is connected to the plurality of first semiconductor layers and a first insulating layer that includes a part farther from the semiconductor substrate than a surface on a side opposite to the semiconductor substrate of the second semiconductor layer and a part closer to the semiconductor substrate than the surface.


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