The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Aug. 09, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Daniel Waddington, Morgan Hill, CA (US);

Mark Kunitomi, San Francisco, CA (US);

Amir Abboud, Sunnyvale, CA (US);

Samyukta Satish Rao, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/00 (2019.01); G06F 7/00 (2006.01); G16B 50/50 (2019.01); G06F 16/22 (2019.01); G16B 30/00 (2019.01); H03M 7/30 (2006.01); G06F 7/14 (2006.01);
U.S. Cl.
CPC ...
G16B 50/50 (2019.02); G06F 7/14 (2013.01); G06F 16/2246 (2019.01); G16B 30/00 (2019.02); H03M 7/70 (2013.01);
Abstract

A computer-implemented method includes receiving genomic data associated with a plurality of genomes and identifying k-mer sets within the genomic data. The method includes constructing a k-mer subset tree according to the following process: performing iterative pairwise comparisons on the k-mer sets, wherein the iterative pairwise comparisons identify fragments with the most shared k-mers, merging the identified fragments into non-leaf nodes of the k-mer subset tree, and placing each remaining k-mer into a leaf node of the k-mer subset tree. The method includes storing the k-mer subset tree. A computer program product for data compression includes a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a computer to cause the compute to perform the foregoing method. A system includes a processor and logic. The logic is configured to perform the foregoing method.


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