The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Sep. 23, 2020
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Markus Koesler, Landshut, DE;

Johann Zipperer, Unterschleissheim, DE;

Christian Wiencke, Garching, DE;

Wolfgang Lutsch, Freising Bayern, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 9/38 (2018.01); G06F 11/267 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3867 (2013.01); G06F 9/30098 (2013.01); G06F 9/3802 (2013.01); G06F 9/3869 (2013.01); G06F 11/267 (2013.01); G06F 11/3636 (2013.01); G06F 11/3648 (2013.01);
Abstract

A semiconductor device comprising a processor having a pipelined architecture and a pipeline flattener and a method for operating a pipeline flattener in a semiconductor device are provided. The processor comprises a pipeline having a plurality of pipeline stages and a plurality of pipeline registers that are coupled between the pipeline stages. The pipeline flattener comprises a plurality of trigger registers for storing a trigger, wherein the trigger registers are coupled between the pipeline stages.


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