The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2022
Filed:
Dec. 17, 2018
Displaylink (Uk) Limited, Cambridge, GB;
Sebastian Matysik, Ruda Slaska, PL;
DISPLAYLINK (UK) LIMITED, Cambridge, GB;
Abstract
A method of processing image data for transmittal to a display device involves receiving a frame of image data, the frame being divided into tile groups composed of tiles of pixels, each having a number of colour component values of a first colour space. Each tile includes a number of colour component planes of the first colour space having the colour component values for the pixels forming the tile. Each tile group is processed in an execution unit, formed by arithmetic logic units (ALUs) and a local shared memory, where each ALU includes dedicated register space for use solely by the ALU, and each tile of each tile group is processed by a number of the ALUs of the execution unit. Each ALU performs a reversible colour transformation (SI) on the colour component values from the first colour space to a second colour space and discards the remaining colour component values and then performs a discrete wavelet transformation (S) on the colour component values of one colour component plane of the second colour space to produce wavelet coefficients, which are quantized (S) and entropy encoded (S) into variable length codes. The variable length codes for all the tiles of the tile group are assembled together for transmittal to a display device. Each ALU stores the data at each stage of the processing in its dedicated register space but not in the local shared memory of the execution unit.