The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Jun. 07, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byounggon Kang, Seoul, KR;

Changbeom Kim, Tongyeong-si, KR;

Dalhee Lee, Seoul, KR;

Wookyu Kim, Daegu, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); G01R 31/3177 (2006.01); H03K 3/3562 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0372 (2013.01); G01R 31/3177 (2013.01); H03K 3/3562 (2013.01);
Abstract

A flip flop includes a master latch and a slave latch. The master latch includes a delay circuit configured to receive a clock signal and generate a first internal signal, and is configured to generate an internal output signal by latching a data signal based on the first internal signal. The slave latch is configured to generate a final signal by latching the internal output signal. The delay circuit is further configured to generate the first internal signal by delaying the clock signal by a delay time when the clock signal has a first logic level and generate the first internal signal based on the data signal when the clock signal has a second logic level.


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