The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

May. 13, 2021
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

John P. Lesso, Edinburgh, GB;

Toru Ido, Edinburgh, GB;

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/217 (2006.01); H03F 1/32 (2006.01); H03F 3/181 (2006.01);
U.S. Cl.
CPC ...
H03F 3/2175 (2013.01); H03F 2200/03 (2013.01); H03F 2200/351 (2013.01);
Abstract

This application describes time-encoding modulator circuitry (), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (). A feedback path provides feedback to an input of the first PWM modulator (). The feedback path includes an ADC () which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC () includes a second PWM modulator () which generates a second PWM signal (Sb) based on the first PWM signal. A controller () controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.


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