The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

May. 07, 2021
Applicant:

Delta Electronics (Shanghai) Co., Ltd, Shanghai, CN;

Inventors:

Teng Liu, Shanghai, CN;

Jianping Ying, Shanghai, CN;

Lifeng Qiao, Shanghai, CN;

Xin Wang, Shanghai, CN;

Hongwei Xiao, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/23 (2006.01); B60L 53/30 (2019.01); H02M 3/335 (2006.01); H02M 7/217 (2006.01); H02M 7/537 (2006.01); H02M 5/458 (2006.01); H02M 7/219 (2006.01); H02M 1/12 (2006.01);
U.S. Cl.
CPC ...
H02M 7/23 (2013.01); B60L 53/30 (2019.02); H02M 3/33569 (2013.01); H02M 5/4585 (2013.01); H02M 7/217 (2013.01); H02M 7/219 (2013.01); H02M 7/537 (2013.01); B60L 2210/10 (2013.01); B60L 2210/30 (2013.01); B60L 2210/40 (2013.01); H02M 1/123 (2021.05); H02M 1/126 (2013.01);
Abstract

A conversion device includes: an inductor electrically connected to the AC power grid; a first-stage converter configured to output a bus voltage according to the AC power grid, wherein the first-stage converter includes an N-level alternating current-direct current (AC-DC) converter, and the N-level AC-DC converter includes a plurality of switch bridge arms, wherein both an upper bridge arm and a lower bridge arm of each of the plurality of switch bridge arms of the N-level AC-DC converter include a plurality of semiconductor devices connected in series, and a rated withstand voltage Vsemi of each of the semiconductor devices is greater than or equal to (Vbus*δ)/((N−1)*Nseries*λ); and a second-stage converter configured to convert the bus voltage into an output voltage to supply energy to the load.


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