The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Oct. 31, 2019
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Ramakanth Kanagovi, Bangalore, IN;

Saheli Saha, Bangalore, IN;

Kevin P. Olalde, McMurray, PA (US);

Geoffrey S. Meyer, Austin, TX (US);

Sunil A. Vyas, Austin, TX (US);

Erik Reyes, Round Rock, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 16/28 (2019.01); G06N 3/04 (2006.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 16/285 (2019.01); G06N 3/04 (2013.01); G06N 20/00 (2019.01);
Abstract

A system, method, and computer-readable medium are provided that engages in a data-driven and machine learning-based approach to arrive at high-value, system under test configurations for validation. Embodiments determine all the possible configurations for a computer platform, considering the variety of processors, boards, adapters, and the like, and then utilize a pseudo-ensemble clustering methodology that combines a k-means clustering technique with a neural-network based Kohenon self-organizing map competitive clustering technique to associate like configurations, and then utilizes a data-driven scoring methodology on the clustered configurations to prioritize those configurations to be validation tested.


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