The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

May. 31, 2019
Applicant:

Graphcore Limited, Bristol, GB;

Inventor:

Brian Manula, Stockholm, SE;

Assignee:

GRAPHCORE LIMITED, Bristol, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 9/445 (2018.01); G06F 9/54 (2006.01); G06F 9/52 (2006.01); G06F 15/173 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4843 (2013.01); G06F 9/383 (2013.01); G06F 9/3851 (2013.01); G06F 9/3871 (2013.01); G06F 9/3877 (2013.01); G06F 9/44578 (2013.01); G06F 9/5027 (2013.01); G06F 9/522 (2013.01); G06F 9/544 (2013.01); G06F 15/17325 (2013.01);
Abstract

A computer system comprising: (i) a computer subsystem configured to act as a work accelerator, and (ii) a gateway connected to the computer subsystem, the gateway enabling the transfer of data to the computer subsystem from external storage at pre-compiled data exchange synchronization points attained by the computer subsystem, which act as a barrier between a compute phase and an exchange phase of the computer subsystem, wherein the computer subsystem is configured to pull data from a gateway transfer memory of the gateway in response to the pre-compiled data exchange synchronization point attained by the subsystem, wherein the gateway comprises at least one processor configured to perform at least one operation to pre-load at least some of the data from a first memory of the gateway to the gateway transfer memory in advance of the pre-compiled data exchange synchronization point attained by the subsystem.


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