The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Jun. 26, 2019
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Chad Balling McBride, North Bend, WA (US);

Amol A. Ambardekar, Redmond, WA (US);

Boris Bobrov, Kirkland, WA (US);

Kent D. Cedola, Belevue, WA (US);

George Petre, Redmond, WA (US);

Larry Marvin Wall, Seattle, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06F 7/48 (2006.01); G06N 3/063 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06F 7/4824 (2013.01); G06N 3/063 (2013.01);
Abstract

An architecture is disclosed for an neural processing element having single instruction, multiple data ('SIMD') compute lanes. The neural processing element includes compute lanes having multipliers configured to multiply a binary operand with another binary operand to generate a binary output. The neural processing element also includes a single adder tree for summing the binary outputs of the hardware binary multipliers. The neural processing element also includes a storage element for storing a binary output of the single hardware binary adder tree.


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