Circuit apparatus in which a processing circuit transfers a full speed transfer packet between physical layer circuits, and an electronic instrument and vehicle including the circuit apparatus

Abstract

A circuit apparatus includes physical layer circuits to which buses compliant with the USB standard are coupled, a processing circuit that performs an FS transfer process, a bus monitoring circuit that monitors the buses, and a bus switching circuit that turns on or off the coupling between a first bus and a second bus based on the result of the monitoring. One of the physical layer circuits includes an FS receiver, an FS driver, and a pull-up control circuit, and the other physical layer circuits includes an FS receiver and an FS driver. When FS_J is detected on the second bus, the bus monitoring circuit turns off the coupling achieved by the bus switching circuit, turns on the pull-up operation performed by the pull-up control circuit, and turns on the FS transfer process performed by the processing circuit.