The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2022

Filed:

Mar. 19, 2020
Applicant:

Ciena Corporation, Hanover, MD (US);

Inventors:

Charles Baudot, Québec, CA;

Alexandre Delisle-Simard, Québec, CA;

Michel Poulin, Québec, CA;

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/13 (2006.01); H01L 21/20 (2006.01); G02F 1/025 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/131 (2013.01); H01L 21/2018 (2013.01); G02B 2006/12178 (2013.01); G02F 1/025 (2013.01); G02F 2201/302 (2013.01);
Abstract

A method of Silicon Selective Epitaxial Growth (SEG) applied to a Silicon on Insulator (SOI) wafer to provide a first region of customized thickness includes with the SOI wafer having a standard thickness, applying a hard mask to a plurality of regions of the SOI wafer including the first region; applying photo-lithography protection to cover the hard mask in all of the plurality of regions except the first region; removing the hard mask in the first region; and performing Silicon SEG in the first region to provide the customized thickness in the first region, wherein the customized thickness is greater than the standard thickness.


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