The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2022

Filed:

Mar. 29, 2021
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Albert Shih-Huai Lin, Mountain View, CA (US);

Amitava Majumdar, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G11C 29/32 (2006.01); G01R 31/317 (2006.01); G11C 7/22 (2006.01); G01R 31/28 (2006.01); G06F 11/36 (2006.01); G01R 31/3185 (2006.01); G01R 31/319 (2006.01); G06F 11/273 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31726 (2013.01); G11C 29/32 (2013.01); G01R 31/2884 (2013.01); G01R 31/31725 (2013.01); G01R 31/31922 (2013.01); G01R 31/318541 (2013.01); G01R 31/318552 (2013.01); G01R 31/318566 (2013.01); G01R 31/318594 (2013.01); G06F 11/2733 (2013.01); G06F 11/36 (2013.01); G06F 11/3656 (2013.01); G06F 11/3664 (2013.01); G11C 7/222 (2013.01); G11C 29/12015 (2013.01);
Abstract

A semiconductor device comprises a plurality of memory elements, test control circuitry, and a testing interface. The test control circuitry is configure to determine that one or more clock signals associated with the memory elements have been stopped and generate a scan clock signal based on the determination that the one or more clock signals have been stopped. The test control circuitry is further configured to communicate the scan clock signal to the memory elements. The testing interface is configured to communicate test data from the memory elements. In one example, the test data is delimited with start and end marker elements. The semiconductor device is mounted to a circuit board and is communicatively coupled to communication pins of the circuit board.


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