The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Oct. 27, 2020
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kyungjin Jeon, Yongin-si, KR;

Soyoung Koo, Yongin-si, KR;

Eoksu Kim, Yongin-si, KR;

Junhyung Lim, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/14 (2006.01); H01L 27/32 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3262 (2013.01); H01L 27/3265 (2013.01); H01L 27/3272 (2013.01); H01L 27/3276 (2013.01); H01L 21/0262 (2013.01); H01L 21/02565 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78633 (2013.01); H01L 2227/323 (2013.01);
Abstract

A display apparatus includes a thin film transistor facing a substrate with a buffer layer therebetween and including a semiconductor layer, a channel region, a source region, a drain region, and a gate electrode; a conductive pattern between the substrate and the semiconductor layer and connected to the semiconductor layer, the conductive pattern facing the semiconductor layer with the buffer layer therebetween; a contact hole in the buffer layer and exposing the conductive pattern to outside the buffer layer; and a display element which is electrically connected to the thin film transistor. The source region or the drain region extends through the contact hole in the buffer layer, to contact the conductive pattern and connect the semiconductor layer to the conductive pattern.


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