The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Dec. 18, 2018
Applicants:

Ntt Electronics Corporation, Yokohama, JP;

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Kenji Kawai, Tokyo, JP;

Ryo Awata, Yokohama, JP;

Kazuhito Takei, Yokohama, JP;

Masaaki Iizuka, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06F 7/53 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06F 7/5324 (2013.01);
Abstract

An arithmetic circuit includes a LUT generation circuit () that, when coefficients c[n] (n=1, . . . , N) are paired two by two, outputs a value calculated for each of the pairs, and distributed arithmetic circuits (-) that calculate values z[m] that are sums of products of data x[m, n] of a data set X[m] containing M pairs of data x[m, n] and the coefficients c[n], in parallel for each of the M pairs. The distributed arithmetic circuit (-) includes binomial distributed arithmetic circuits that, for each of the pairs, calculate sums of products of a value obtained by pairing N data x[m, n] corresponding to the circuit two by two and a value obtained by pairing the coefficients c[n] two by two, and a figure matching circuit that matches a number of decimal figures of the sums with a predetermined number of decimal figures.


Find Patent Forward Citations

Loading…