The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Dec. 22, 2019
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Bharat Kumar Rangarajan, Bangalore, IN;

Rajesh Arimilli, Bangalore, IN;

Srinivas Turaga, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/3234 (2019.01); G06F 1/3293 (2019.01); G06F 1/3296 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3275 (2013.01); G06F 1/3293 (2013.01); G06F 1/3296 (2013.01);
Abstract

Various embodiments include methods and devices for cache memory power control. Some embodiments may include determining whether a processor is entering a lowest power mode of the processor, and switching a lowest power mode switch control signal to indicate to a cache power switch of the processor switching an electrical connection of a cache memory from a memory power rail to a processor power rail in response to determining that the processor is entering a lowest power mode.


Find Patent Forward Citations

Rangarajan, Bharat. (2022). Method and system for improving rock bottom sleep current of processor memories (U.S. Patent No. 11493986). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11493986

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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