The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Apr. 30, 2021
Applicant:

Movellus Circuits Incorporated, Ann Arbor, MI (US);

Inventors:

Jeffrey Fredenburg, Ann Arbor, MI (US);

Xiao Wu, Ann Arbor, MI (US);

Assignee:

Movellus Circuits, Inc., Ann Arbor, MI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/08 (2006.01); G01R 23/10 (2006.01); G06F 1/10 (2006.01); H03K 21/02 (2006.01);
U.S. Cl.
CPC ...
G06F 1/08 (2013.01); G01R 23/10 (2013.01); G06F 1/10 (2013.01); H03K 21/02 (2013.01);
Abstract

A frequency counter circuit includes a first counter path to receive a digitally-controlled oscillator (DCO) clock signal and is configured to generate a first count corresponding to a first frequency of a first reduced clock signal corresponding to the DCO clock signal. A second counting path receives the DCO clock signal and generates a second count corresponding to a second frequency of a second reduced clock signal corresponding to the DCO clock signal. The first reduced clock signal is an integer multiple frequency of the second reduced clock signal. Detection circuitry detects a timing violation associated with the DCO clock signal based on a comparison between at least a portion of the first count and at least a portion of the second count.


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