The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2022
Filed:
Jan. 25, 2021
Applicant:
Google Llc, Mountain View, CA (US);
Inventors:
Namhoon Kim, San Jose, CA (US);
Woon-Seong Kwon, Santa Clara, CA (US);
Teckgyu Kang, Saratoga, CA (US);
Yujeong Shim, Cupertino, CA (US);
Assignee:
Google LLC, Mountain View, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 25/065 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01);
Abstract
An integrated circuit package including a substrate configured to receive one or more high-bandwidth memory (HBM) stacks on the substrate, an interposer positioned on the substrate and configured to receive a logic die on the interposer, a plurality of interposer channels formed in the interposer and connecting the logic die to the one or more HBM stacks, and a plurality of substrate traces formed in the substrate and configured to interface the plurality of interposer channels to the one or more HBM stacks.