The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Nov. 15, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyun Chul Sagong, Hwaseong-si, KR;

June Kyun Park, Seongnam-si, KR;

Hyun Jin Kim, Suwon-si, KR;

Ki Hyun Choi, Yongin-si, KR;

Sang Woo Pae, Seongnam-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 27/088 (2006.01); H01L 27/11 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 22/30 (2013.01); H01L 27/0886 (2013.01); H01L 27/1104 (2013.01); H01L 29/7851 (2013.01);
Abstract

A semiconductor device including a test structure includes a semiconductor substrate and a plurality of test structures on the semiconductor substrate. The test structures include respective lower active regions extending from the semiconductor substrate in a vertical direction and having different widths, and upper active regions extending from respective lower active regions in the vertical direction. Each of the lower active regions includes first regions and second regions. The first regions overlap the upper active regions and are between the second regions, and the second regions include outer regions and inner regions between the outer regions. The outer regions, located in the lower active regions having different widths, have different widths.


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