The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Oct. 30, 2019
Applicant:

Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen, CN;

Inventors:

Liuqi Zhang, Shenzhen, CN;

Baixiang Han, Shenzhen, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G09G 2300/0852 (2013.01); G09G 2330/045 (2013.01);
Abstract

A gate driver on array (GOA) circuit layout is provided, including a plurality of driving thin-film transistor units, wherein each of the driving thin-film transistor units includes a wiring side and a capacitor side, and any two adjacent driving thin-film transistor units are spaced apart and connected in series with each other; and a plurality of first capacitor areas, wherein each of the first capacitor areas is disposed between two adjacent capacitor sides of the driving thin-film transistor units. The GOA circuit layout according to the present invention increases heat dissipation area for the driving thin-film transistors, which is more advantageous for heat dissipation. On the other hand, because of sufficient use of the first capacitor areas, a size of layout is basically not increased.


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