The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Aug. 18, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Min Gon Shin, Uiwang-si, KR;

Ji Soo Kim, Seongnam-si, KR;

Seung-Jae Lee, Hwaseong-si, KR;

Ye Jin Yoon, Hwaseong-si, KR;

Hwa Soo Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 13/16 (2006.01); G06F 21/31 (2013.01); G06F 13/42 (2006.01); G06F 21/79 (2013.01); G06F 13/12 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1483 (2013.01); G06F 12/1466 (2013.01); G06F 13/126 (2013.01); G06F 13/1668 (2013.01); G06F 13/4221 (2013.01); G06F 21/31 (2013.01); G06F 21/79 (2013.01);
Abstract

A storage device including: a bridge board to receive a first command; an authenticator to receive user information; and a memory device to receive the first command from the bridge board, the memory device includes a memory controller which determines a status of the memory device, provides status information including the determined status of the memory device to the bridge board, determines the status of the memory device as an unlocked status or a locked status, the bridge board includes a transceiver which communicates with the host through an interface, a register which stores interface information, and a bridge board controller which generates a first response to the first command in a format corresponding to the interface using the interface information, and provides the first response to a host, the first response includes a status bit which inhibits or allows a write operation with respect to the memory device.


Find Patent Forward Citations

Loading…