The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Apr. 16, 2021
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventors:

Amol Ashok Ambardekar, Redmond, WA (US);

Chad Balling McBride, North Bend, WA (US);

George Petre, Redmond, WA (US);

Kent D. Cedola, Bellevue, WA (US);

Larry Marvin Wall, Seattle, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/04 (2006.01); G06N 3/08 (2006.01); G06N 3/063 (2006.01); G06F 17/16 (2006.01); G06F 1/32 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3243 (2013.01); G06F 1/3275 (2013.01); G06N 3/04 (2013.01); G06N 3/0454 (2013.01); G06N 3/063 (2013.01); G06F 17/16 (2013.01); G06N 3/08 (2013.01);
Abstract

Techniques to provide for improved (i.e., reduced) power consumption in an exemplary neural network (NN) and/or Deep Neural Network (DNN) environment using data management. Improved power consumption in the NN/DNN may be achieved by reducing a number of bit flips needed to process operands associated with one or more storages. Reducing the number bit flips associated with the NN/DNN may be achieved by multiplying an operand associated with a first storage with a plurality of individual operands associated with a plurality of kernels of the NN/DNN. The operand associated with the first storage may be neuron input data and the plurality of individual operands associated with the second storage may be weight values for multiplication with the neuron input data. The plurality of kernels may be arranged or sorted and subsequently processed in a manner that improves power consumption in the NN/DNN.


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